Field
The present invention relates to a semiconductor device, a method of manufacturing a semiconductor device and a power conversion device.
Background Art
In general, power devices are required to have low loss, withstand voltage holding capability, guarantee of a safe operation area which prevents the devices from falling into destruction during operation, and the like. Therefore, miniaturization and weight saving of the devices have progressed, which have led, in a broad sense, to care for the global environment by reduction of energy consumption. Furthermore, it has been required to realize these characteristics at the possible lowest cost. IGBT (Insulated Gate Bipolar Transistor) has been widely used as one configuration for solving the above problem.
Japanese Unexamined Patent Application Publication No. 2016-157934 A discloses an n−-type semiconductor substrate functioning as a drift layer, a p-type base layer formed on the drift layer, and a carrier storage layer configured to have a higher impurity concentration than the drift layer. The carrier storage layer is provided between the drift layer and the base layer.
A period during which a semiconductor device such as an IGBT switches from OFF-state to ON-state is defined as a turn-on period, and a period during which the semiconductor device switches from ON-state to OFF-state is defined as a turn-off period. In the turn-on period and the turn-off period, the semiconductor device may generate noise to cause malfunction of other devices, or the semiconductor device itself may malfunction. For example, when the potential of the drift layer or the carrier store layer varies, a displacement current flows in a gate electrode to change the gate potential, resulting in a risk that malfunction occurs. Furthermore, when the potential around the gate electrode varies under short-circuit of the device, a displacement current flows in the gate electrode to increase the gate potential, resulting in a risk that the short-circuit current increases and damages the device.
A method of reducing the depth of a trench type gate electrode from the surface of a substrate may be considered in order to prevent an adverse effect caused by the displacement current flowing in the gate electrode. However, this method lowers the main withstand voltage between an emitter and a collector.